Ms. Razia Sultana
Designation : Assistant Professor
Phone No. : 03224-252900 Extn:230
Email : razia04@gmail.com
Contact Details :
Faculty Room-3, Department of Electronics & Communication Engineering, Haldia Institute of Technology, ICARE Complex, Hatiberia, Haldia, West Bengal, 721657
XILINX, TANNER EDA, MATLAB
Odd Semester 2015-16 |
Basic Electrical and Electronics engg.-I (ES-101) |
Course Home |
Basic Electronics engg. -I Lab (ES-191) |
Course Home |
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Even Semester 2015-16 |
Renewable Energy (EE) (EC-802C) |
Course Home |
Basic Electrical and Electronics engg.-II (ES-201) |
Course Home | |
Basic Electronics engg. -II Lab (ES-291) |
Course Home |
Microelectronics and VLSI design
[1] | R.Sultana, J. Samanta," Comparision of different design techniques of XOR & AND gate using EDA simulation tool ", Inernational Journal of VLSI and Embedded System (IJVES), ISSN:2249-6556,volume-04,Issue -03,May-June 2013. |
[2] | S.R.Mondal,M.Bhowmik, S.Maity,R.Sultana,"Comparative analysis and study on 4-bit RCA and CSA using CMOS logic", International Journal for Soft Computing and Engineering(IJSCE),ISSN:2231-2307, Volume-4,Issue-6,January 2015. |
[3] | M.Bhowmik, S.R. Mondal,R.Sultana,S.Maity,S.Mukherjee,"High performance Carry Skip Adder using Reversible logic, International Journal of VLSI and Embedded System (IJVES),ISSN:2249-6556,Vol-6, Article-12521, January 2015. |
[4] | S.Matia, A.K. Pramanik,R.Sultana,"Design An 8-Bit Microprocessor Using VHDL ",American journal of Electronics & Communication, vol.2, No.-5, pp-122-126,September 2015. |
[5] | A.Maiti, K.Chakraborty, R.Sultana, S.Maity,“Design and Implementation of 4 bit Vedic Multiplier”, International Journal of Emerging in Science and Technology, ISSN: 2348-9480, vol. -03, Issue 05 ,pp-3865-3868,May 2016. |
[6] | K.Chakraborty,A. Maiti, S.Maity, R.Sultana,“Design and Implementation of High-Speed, Low power Multipliers Using Reversible Logic” , International Journal of Emerging in Science and Technology, ISSN:2348-9480,Vol-3, Issue-05,pp-3859-3864,May2016. |
[1] | J.Samanta,R.Sultana, J.Bhaumik“ FPGA Based Modified Karatsuba Multiplier”, International Conference on VLSI and Signal Processing (ICVSP): 10 – 12 January, 2014. |
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